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KSZ8081MLXCA Datasheet - Microchip
Manufacturer: | Microchip |
Category: | Interface ICs |
Case Package: | LQFP-48 |
Description: | PHY 1CH 10Mbps/100Mbps 3.3V 48Pin LQFP Tray |
Pictures: |
KSZ8081MLXCADatasheet PDF
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Micrel, Inc.
KSZ8081MLX
August
19, 2015
11
Revision 1.3
Pin Description (Continued)
Pin Number Pin Name Type
(2)
Pin Function
35 TXD0 I
MII Mode: MII Transmit Data Input[0]
(
4
)
36 TXD1 I
MII Mode: MII Transmit Data Input[1]
(
4
)
37 GND GND Ground.
38 TXD2 I
MII Mode: MII Transmit Data Input[2]
(
4
)
39 TXD3 I
MII Mode: MII Transmit Data Input[3]
(
4
)
40
COL/
CONFIG0
Ipd/O
MII Mode: MII Collision Detect output
Config. Mode: The pull-up/pull-down value is latched as CONFIG0 at the de-assertion
of reset. See the Strapping Options section for details.
41
CRS/
CONFIG1
Ipd/O
MII Mode: MII Carrier Sense Output
Config. Mode: The pull-up/pull-down value is latched as CONFIG1 at the de-assertion
of reset. See the Strapping Options section for details.
42
LED0/
NWAYEN
Ipu/O
LED Output: Programmable LED0 Output
Config. Mode: Latched as auto-negotiation enable (Register 0h, Bit [12]) at the de-
assertion of reset. See the Strapping Options section for details.
The LED0 pin is programmable using Register 1Fh Bits [5:4], and is defined as
follows:
LED Mode = [00]
Link/Activity Pin State LED Definition
No link High OFF
Link Low ON
Activity Toggle Blinking
LED Mode = [01]
Link Pin State LED Definition
No link High OFF
Link Low ON
LED Mode = [10], [11] Reserved
Note:
4. MII TX Mode: The TXD[3:0] bits are synchronous with TXC. When TXEN is asserted, TXD[3:0] presents valid data from the MAC.
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