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LIS2DW12 Datasheet - ST Microelectronics
Manufacturer: | ST Microelectronics |
Description: | MEMS digital output motion sensor:high-performance ultra-low-power 3-axis "femto" accelerometer |
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LIS2DW12Datasheet PDF
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DocID029682 Rev 4 33/63
LIS2DW12 Digital interfaces
63
6 Digital interfaces
The registers embedded inside the LIS2DW12 may be accessed through both the I
2
C and
SPI serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire
interface mode.
The serial interfaces are mapped to the same pins. To select/exploit the I
2
C interface, the
CS line must be tied high (i.e. connected to Vdd_IO).
6.1 I
2
C serial interface
The LIS2DW12 I
2
C is a bus slave. The I
2
C is employed to write data into registers whose
content can also be read back.
The relevant I
2
C terminology is given in the table below.
There are two signals associated with the I
2
C bus: the serial clock line (SCL) and the Serial
DAta line (SDA). The latter is a bidirectional line used for sending and receiving the data
to/from the interface. Both the lines must be connected to Vdd_IO through an external pull-
up resistor. When the bus is free, both the lines are high.
The I
2
C interface is compliant with fast mode (400 kHz) I
2
C standards as well as with
normal mode.
In order to disable the I
2
C block, CTRL2 (21h) (I2C_DISABLE) = 1 must be set.
Table 15. Serial interface pin description
Pin name Pin description
CS
SPI enable
I
2
C/SPI mode selection (1: SPI idle mode / I
2
C communication enabled; 0: SPI
communication mode / I
2
C disabled)
SCL
SPC
I
2
C serial clock (SCL)
SPI serial port clock (SPC)
SDA
SDI
SDO
I
2
C serial data (SDA)
SPI serial data input (SDI)
3-wire interface serial data output (SDO)
SA0
SDO
I
2
C address selection (SA0)
SPI serial data output (SDO)
Table 16. I
2
C terminology
Term Description
Transmitter The device which sends data to the bus
Receiver The device which receives data from the bus
Master
The device which initiates a transfer, generates clock signals and terminates a
transfer
Slave The device addressed by the master
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