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2010 Microchip Technology Inc. DS22008E-page 11
MCP1702
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
3.1 Ground Terminal (GND)
Regulator ground. Tie GND to the negative side of the
output and the negative side of the input capacitor.
Only the LDO bias current (2.0 µA typical) flows out of
this pin; there is no high current. The LDO output
regulation is referenced to this pin. Minimize voltage
drops between this pin and the negative side of the
load.
3.2 Regulated Output Voltage (V
OUT
)
Connect V
OUT
to the positive side of the load and the
positive terminal of the output capacitor. The positive
side of the output capacitor should be physically
located as close to the LDO V
OUT
pin as is practical.
The current flowing out of this pin is equal to the DC
load current.
3.3 Unregulated Input Voltage Pin
(V
IN
)
Connect V
IN
to the input unregulated source voltage.
Like all LDO linear regulators, low source impedance is
necessary for the stable operation of the LDO. The
amount of capacitance required to ensure low source
impedance will depend on the proximity of the input
source capacitors or battery type. For most
applications, 1 µF of capacitance will ensure stable
operation of the LDO circuit. For applications that have
load currents below 100 mA, the input capacitance
requirement can be lowered. The type of capacitor
used can be ceramic, tantalum or aluminum
electrolytic. The low ESR characteristics of the ceramic
will yield better noise and PSRR performance at
high-frequency.
Pin No.
SOT-23A
Pin No.
SOT-89
Pin No.
TO-92
Symbol Function
1 1 1 GND Ground Terminal
233V
OUT
Regulated Voltage Output
32, Tab2 V
IN
Unregulated Supply Voltage
– – – NC No connection
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