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74AHC14 Datasheet PDF

Part Series:74AHC14 Series
Category:Logic Gates
Description:Inverter Schmitt Trigger 6Element CMOS 14Pin TSSOP T/R
Document:74AHC14D,118 Datasheet PDF (27 Pages)

74AHC14 Logic Gates Datasheet PDF

#1
74AHC14D,118
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#2
74AHC14PW-Q100,118
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#3
74AHC14PW-Q100,118
1.6
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#4
74AHC14PW,118
2.4
Nexperia

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74AHC14PW,118 - NXP Specifications

TYPE
DESCRIPTION
Mounting Style
Surface Mount
Number of Pins
14 Pin
Supply Voltage (DC)
2.00V (min)
Case/Package
TSSOP-14
Output Current
25 mA
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74AHC14PW,118 - NXP Function Overview

●The 74AHC14PW is a high-speed Si-gate CMOS device provides six inverting buffers with Schmitt-trigger action. The device is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A. The device is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.
● Balanced propagation delays
● All inputs have Schmitt-trigger actions
● Inputs accept voltages higher than VCC
● ESD PROT - HBM EIA/JESD22-A114E >2000V, MM EIA/JESD22-A115-A >200V, CDM EIA/JESD22-C101C >1000V
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