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74AHC1G125 Datasheet PDF

Part Series:74AHC1G125 Series
Category:Logic ICs
Description:IC BUS BUFF DVR TRI-ST 5TSSOP
Document:74AHC1G125DBVTE4 Datasheet PDF (23 Pages)

74AHC1G125 Logic ICs Datasheet PDF

#1
74AHC1G125DBVTE4
2.3
TI
#2
74AHC1G125DBVRG4
2.4
TI
#3
74AHC1G125DCKRG4
2.1
TI
#4
74AHC1G125W5-7
2.1
Diodes

74AHC1G125 Datasheet PDF Logic ICs

Datasheet PDF
22 Pages
TI
Buffer/Line Driver 1CH Non-Inverting 3-ST CMOS 5Pin SC-70 T/R
Datasheet PDF
22 Pages
TI
Buffer/Line Driver 1CH Non-Inverting 3-ST CMOS 5Pin SOT-23 T/R
Datasheet PDF
22 Pages
TI
Buffer/Line Driver 1CH Non-Inverting 3-ST CMOS 5Pin SC-70 T/R
Datasheet PDF
22 Pages
TI
Buffer/Line Driver 1CH Non-Inverting 3-ST CMOS 5Pin SOT-23 T/R
Datasheet PDF
22 Pages
TI
Buffer/Line Driver 1CH Non-Inverting 3-ST CMOS 5Pin SC-70 T/R
Datasheet PDF
22 Pages
TI
Buffer/Line Driver 1CH Non-Inverting 3-ST CMOS 5Pin SOT-553 T/R
Datasheet PDF
18 Pages
NXP
Buffer/Line Driver 1CH Non-Inverting 3-ST CMOS 5Pin TSSOP T/R
Datasheet PDF
18 Pages
NXP
Buffer/Line Driver 1CH Non-Inverting 3-ST CMOS 5Pin TSOP T/R
Datasheet PDF
18 Pages
Nexperia
IC BUS BUFF/LINE DVR 3ST 5TSSOP
Datasheet PDF
18 Pages
Nexperia
IC BUFFER/LINEDVR 3ST XSON6
Datasheet PDF
18 Pages
NXP
Buffer/Line Driver 1CH Non-Inverting 3-ST CMOS 6Pin XSON T/R
Datasheet PDF
17 Pages
Nexperia
IC BUS BUFF DVR TRI-ST 5TSSOP
Datasheet PDF
17 Pages
NXP
Buffer/Line Driver 1CH Non-Inverting 3-ST CMOS 5Pin TSSOP
Datasheet PDF
17 Pages
Nexperia
IC BUS BUFF DVR TRI-ST 5TSOP
Datasheet PDF
15 Pages
Nexperia
IC BUFFER/LINEDVR 3ST XSON6
Datasheet PDF
9 Pages
Diodes
Buffer/Line Driver 1CH Non-Inverting 3-ST CMOS 5Pin SOT-353 T/R
More 74AHC1G125 Datasheet PDF >

74AHC1G125GW,125 - Nexperia Specifications

TYPE
DESCRIPTION
Mounting Style
Surface Mount
Number of Pins
5 Pin
Case/Package
TSSOP-5
Number of Positions
5 Position
Power Dissipation
250 mW
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74AHC1G125GW,125 - Nexperia Function Overview

●The 74AHC1G125GW,125 is a Bus Buffer/Line Driver has CMOS input switching levels and supply voltage range 2 to 5.5V. The 74AHC1G125 is high-speed Si-gate CMOS device. It provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (OE). A HIGH at OE causes the output to assume a high-impedance OFF-state.
● Symmetrical output impedance
● High noise immunity
● Low power dissipation
● Balanced propagation delays
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