74HC4515 Datasheet PDF

●The 74HC4515D is a 4-to-16 line inverting Decoder/Demultiplexer with input latches. This high-speed Si-gate CMOS device is pin compatible with 4515 of the 4000B series. It has four binary weighted address inputs (A0 to A3) with latches, a latch enable input (LE\\) and an active low enable input (E\\). The 16 inverting outputs (Q0\ to Q15\\) are mutually exclusive active low. When LE is high, the selected output is determined by the data on An. When LE goes low, the last data present at An are stored in the latches and the outputs remain stable. When E\ is low, the selected output, determined by the contents of the latch, is low. When E\ is high, all outputs are high. The E\ does not affect the state of the latch. When the 4515 series is used as a demultiplexer, E\ is the data input and A0 to A3 are the address inputs.

● Inverting outputs

● Standard output capability

● Complies with JEDEC standard No. 7A