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74HC573 Datasheet PDF

Part Series:74HC573 Series
Category:Logic ICs
Description:IC LATCH OCTAL D 3STATE 20SOIC
Document:74HC573D Datasheet PDF (38 Pages)

74HC573 Datasheet PDF Logic ICs

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74HC573D,653 - Nexperia Specifications

TYPE
DESCRIPTION
Mounting Style
Surface Mount
Number of Pins
20 Pin
Supply Voltage (DC)
2.00V (min)
Capacitance
3.5 pF
Case/Package
SOIC-20
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74HC573D,653 - Nexperia Function Overview

The 74HC573D is an octal transparent D Latch pin compatible with low-power Schottky TTL (LSTTL). It features separate D-type inputs for each latch and 3-state true outputs for bus-oriented applications. A LE input and an OE\ input are common to all latches. When LE is high, data at the Dn inputs enter the latches. In this condition, the latch is transparent, i.e. a latch output changes state each time its corresponding D input changes. When LE is low the latches store the information that was present at the D-inputs a set-up time preceding the high-to-low transition of LE. When OE\ is low, the contents of the 8 latches are available at the outputs. When OE\ is high, the outputs go to the high-impedance OFF-state. Operation of the OE\ input does not affect the state of the latch.
Inputs and outputs on opposite sides of package allowing easy interface with microprocessors
Useful as input or output port for microprocessors and microcomputers
3-state Non-inverting outputs for bus-oriented applications
Common 3-state output enable input
CMOS Input level
Complies with JEDEC standard No. 7A
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