74HC595N Pinout Diagram

●The 74HC595 is a high speed Si gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). Data is shifted on the positive going transitions of the shift register clock input (SHCP). The data in each register is transferred to the storage register on a positive going transition of the storage register clock input (STCP). If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register.

● 8 bit serial input

● 8 bit serial or parallel output

● Storage register with 3 state outputs

● Shift register with direct clear

● 100 MHz (typical) shift out frequency