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74HC74 Pinout Diagram

Part Series:74HC74 Series
Category:Logic Gates
Description:Philips 74hc74d Flip-Flop ; So-14; 5V (Typ.); -4 0; +125; 1000Ns (Typ.) t r; 1000Ns (Typ.)
Document:74HC7403D,518 (34 Pages)

74HC74 Logic Gates Pinout Diagram

74HC74D - NXP Specifications

TYPE
DESCRIPTION
Mounting Style
Surface Mount
Frequency
76 MHz
Number of Pins
14 Pin
Supply Voltage (DC)
5.00 V, 6.00 V (max)
Case/Package
SOIC
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74HC74D - NXP Function Overview

The 74HC74 is a dual positive edge triggered D-type flip-flop. They have individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQ outputs. Data at the nD-input, that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition, is stored in the flip-flop and appears at the nQ output. Schmitt-trigger action in the clock input, makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Symmetrical output impedance
Low power dissipation
High noise immunity
Balanced propagation delays
Specified in compliance with JEDEC standard no. 7A
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