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74LVC244 Datasheet PDF

Part Series:74LVC244 Series
Category:Logic ICs
Description:IC BUFF/DVR TRI-ST DUAL 20TSSOP
Document:74LVC244APW,118 Datasheet PDF (26 Pages)

74LVC244 Datasheet PDF Logic ICs

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74LVC244APW,118 - Nexperia Specifications

TYPE
DESCRIPTION
Mounting Style
Surface Mount
Number of Pins
20 Pin
Case/Package
TSSOP-20
Number of Channels
8 Channel
Number of Positions
20 Position
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74LVC244APW,118 - Nexperia Function Overview

The 74LVC244APW,118 is an octal non-inverting Buffer/Line Driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Schmitt-trigger action at all inputs makes the circuit highly tolerant for slower input rise and fall times. Inputs can be driven from either 3.3/5V devices. In 3-state operation, outputs can handle 5V. These features allow the use of this device as translators in a mixed 3.3 and 5V environment. The 74LVCH244A bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs.
CMOS low-power consumption
Direct interface with TTL levels
Complies with JEDEC standard
5V Tolerant inputs/outputs for interfacing with 5V logic
High-impedance when VCC = 0V
Inputs accept voltages up to 5.5V
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