74LVC2G17 Datasheet PDF

●The 74LVC2G17GW,125 is a dual non-inverting Buffer with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Inputs can be driven from either 3.3/5V devices. This feature allows the use of these devices as translators in a mixed 3.3 and 5V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

● High noise immunity

● CMOS low-power consumption

● Direct interface with TTL levels

● Complies with JEDEC standard

● 5V Tolerant input/output for interfacing with 5V logic

● Latch-up performance exceeds 250mA

● ±24mA Output drive