Part Datasheet Search > Digital to Analog > AD7537 Datasheet PDF
Images are for reference

AD7537 Datasheet PDF

Part Series:AD7537 Series
Category:Digital to Analog
Description:ANALOG DEVICES AD7537JNZ Digital to Analog Converter, 12Bit, 667KSPS, Parallel, 10.8V to 16.5V, DIP, 24Pins
Document:AD7537LP Datasheet PDF (21 Pages)

AD7537 Datasheet PDF Digital to Analog

12 Pages
ADI
DAC 2CH R-2R 12Bit 24Pin SOIC W
11 Pages
ADI
ANALOG DEVICES AD7537KNZ Digital to Analog Converter, Dual, 12Bit, 10.8V to 16.5V, DIP, 24Pins
11 Pages
ADI
Digital to Analogue Converter, Dual, 12Bit, 10.8V to 16.5V, PLCC, 28Pins
11 Pages
ADI
ANALOG DEVICES AD7537JPZ Digital to Analog Converter, Dual, 12Bit, 10.8V to 16.5V, PLCC, 28Pins New
11 Pages
ADI
DAC 2CH R-2R 12Bit 28Pin PLCC
11 Pages
ADI
DAC 2CH R-2R 12Bit 28Pin PLCC
11 Pages
ADI
IC DUAL, PARALLEL, 8Bits INPUT LOADING, 0.8us SETTLING TIME, 12Bit DAC, CDIP24, 0.3INCH, SKINNY, CERDIP-24, Digital to Analog Converter
11 Pages
ADI
DAC 2CH R-2R 12Bit 24Pin CDIP Tube
10 Pages
ADI
DAC 2CH R-2R 12Bit 24Pin PDIP Tube
10 Pages
ADI
DAC 2CH R-2R 12Bit 24Pin SOIC W
10 Pages
ADI
DUAL, PARALLEL, 8Bits INPUT LOADING, 0.8us SETTLING TIME, 12Bit DAC, PDIP24, 0.3INCH, SKINNY, PLASTIC, DIP-24
10 Pages
ADI
DAC 2CH R-2R 12Bit 28Pin PLCC Tube
10 Pages
ADI
DAC 2CH R-2R 12Bit 24Pin CDIP Tube
10 Pages
ADI
DAC 2CH R-2R 12Bit 28Pin PLCC T/R
10 Pages
ADI
IC DUAL, PARALLEL, 8Bits INPUT LOADING, 0.8us SETTLING TIME, 12Bit DAC, PDSO24, SOIC-24, Digital to Analog Converter
10 Pages
ADI
DAC 2CH R-2R 12Bit 24Pin SOIC W T/R

AD7537JNZ - ADI Specifications

TYPE
DESCRIPTION
Mounting Style
Through Hole
Number of Pins
24 Pin
Supply Voltage (DC)
15.0V (max)
Case/Package
DIP-24
Number of Outputs
2 Output
show more

AD7537JNZ - ADI Function Overview

The AD7537JNZ is a 12-bit current output monolithic Digital-to-analog Converter (DAC) with a separate reference input is provided. The dual DAC saves valuable board space and the monolithic construction ensures excellent thermal tracking. The control signals for register loading are A0, A1, CS, WR and UPD. Data is loaded to the input registers when CS and WR are low. To transfer this data to the DAC registers, UPD must be taken low with WR. Added features on the AD7537 include an asynchronous CLR line which is very useful in calibration routines. When this taken low, all registers are cleared. The double buffering of the data inputs allows simultaneous update of DAC. This increases the device versatility, for instance one DAC may be operated with AGND biased while the other is connected in the standard configuration. It is manufactured using the linear compatible CMOS process. It is speed compatible with most microprocessors and accepts TTL, 74HC and 5V CMOS logic level inputs.
2-byte loading structure
Designed for right-justified data format
Separate AGND line
DAC ladder resistance matching - 0.5%
4-quadrant multiplication
Low gain error
Byte loading structure
Fast interface timing
show more
Part Datasheet PDF Search
72,405,303 Parts Datasheet PDF, Update more than 5,000 PDF files ervery day.