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AD9517 Datasheet PDF

Part Series:AD9517 Series
Category:Clock & Timing
Description:Clock Generator -40℃ to 85℃ 48Pin LFCSP EP Tray
Document:AD9517-4ABCPZ Datasheet PDF (83 Pages)

AD9517 Datasheet PDF Clock & Timing

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80 Pages
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80 Pages
ADI
Clock Generator 48Pin LFCSP EP Tray
80 Pages
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Clock Generator -40℃ to 85℃ 48Pin LFCSP EP Tray

AD9517-4ABCPZ - ADI Specifications

TYPE
DESCRIPTION
Mounting Style
Surface Mount
Frequency
1.8 GHz
Number of Pins
48 Pin
Supply Voltage (DC)
3.13V (min)
Case/Package
LFCSP-48
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AD9517-4ABCPZ - ADI Function Overview

The AD9517-4ABCPZ is a 12-output Clock Generator with 1.6GHz integrated voltage-controlled oscillator (VCO). It provides a multi-output clock distribution function with sub pico second jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 1.45 to 1.80GHz. Optionally an external VCO/VCXO of up to 2.4GHz can be used. It emphasizes low jitter and phase noise to maximize data converter performance and it can benefit other applications with demanding phase noise and jitter requirements. It features four LVPECL outputs (in two pairs) and four LVDS outputs (in two pairs). Each LVDS output can be reconfigured as two CMOS outputs. The LVPECL outputs operate to 1.6GHz, the LVDS outputs operate to 800MHz and the CMOS outputs operate to 250MHz. Each pair of outputs has dividers that allow both the divide ratio and coarse delay (or phase) to be set. The range of division for the LVPECL outputs is 1 to 32.
Low phase noise, phase-locked loop (PLL)
Reference monitoring capability
Automatic revertive and manual reference switchover/holdover modes
Programmable delays in path to PFD
Digital or analogue lock detect
Each output pair shares a 1-to-32 divider with coarse phase delay
Channel-to-channel skew paired outputs of <10ps
Each output pair shares two cascaded 1-to-32 dividers with coarse phase delay
Automatic synchronization of all outputs on power-up
Manual output synchronization available
1 Differential or 2 single-ended reference inputs
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