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AD9788 Datasheet PDF

Part Series:AD9788 Series
Description:Dual 16Bit 800MSPS DAC with Low Power 32Bit Complex NCO
Document:AD9788BSVZRL Datasheet PDF (65 Pages)

AD9788 Datasheet PDF

64 Pages
ADI
Dual 16Bit 800MSPS DAC with Low Power 32Bit Complex NCO

AD9788 - ADI Function Overview

Product Details
The AD9785/AD9787/AD9788 are 12-bit, 14-bit, and 16-bit, high dynamic range TxDAC® devices, respectively, that provide a sample rate of 800 MSPS, permitting multicarrier generation up to the Nyquist frequency. Features are included for optimizing direct conversion transmit applications, including complex digital modulation, as well as gain, phase, and offset compensation. The DAC outputs are optimized to interface seamlessly with analog quadrature modulators, such as the ADL5375 family from Analog Devices, Inc. A serial peripheral interface (SPI) provides for programming and readback of many internal parameters. Full-scale output current can be programmed over a range of 10 mA to 30 mA. The AD9785/AD9787/AD9788 family is manufactured on a 0.18 μm CMOS process and operates from 1.8 V and 3.3 V supplies. It is enclosed in a 100-lead TQFP package.
Product Highlights
1. Low noise and intermodulation distortion (IMD) enable high quality synthesis of wideband signals from baseband to high intermediate frequencies.
2. Proprietary DAC output switching technique enhances dynamic performance.
3. CMOS data input interface with adjustable setup and hold.
4. Low power complex 32-bit numerically controlled oscillators (NCOs).
Applications
Wireless infrastructure
W-CDMA, CDMA2000, TD-SCDMA, WiMAX, GSM
Digital high or low IF synthesis
Transmit diversity
Wideband communications
LMDS/MMDS, point-to-point
### Features and Benefits
Analog output: adjustable 8.7 mA to 31.7 mA, RL = 25 Ω to 50 Ω
Low power, fine complex NCO allows carrier placement anywhere in DAC bandwidth while adding <300 mW power
Auxiliary DACs allow I and Q gain matching and offset control
Includes programmable I and Q phase compensation
Internal digital upconversion capability
Multiple chip synchronization interface
High performance, low noise PLL clock multiplier
Digital inverse sinc filter
100-lead, exposed pad TQFP package
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