C8051 Datasheet PDF

●System Overview

●C8051F330/1/2/3/4/5 devices are fully integrated mixed-signal System-on-a-Chip MCUs. Highlighted features are listed below. Refer to Table 1.1 for specific product feature selection.

●• High-speed pipelined 8051-compatible microcontroller core (up to 25 MIPS)

●• In-system, full-speed, non-intrusive debug interface (on-chip)

●• True 10-bit 200 ksps 16-channel single-ended/differential ADC with analog multiplexer

●• 10-bit Current Output DAC

●• Precision programmable 25 MHz internal oscillator

●• Up to 8 kB of on-chip Flash memory—512 bytes are reserved

●• 768 bytes of on-chip RAM

●• SMBus/I2C, Enhanced UART, and Enhanced SPI serial interfaces implemented in hardware

●• Four general-purpose 16-bit timers

●• Programmable Counter/Timer Array (PCA) with three capture/compare modules and Watchdog Timer function

●• On-chip Power-On Reset, VDD Monitor, and Temperature Sensor

●• On-chip Voltage Comparator

●• 17 Port I/O (5 V tolerant)

●Analog Peripherals

●   - 10-Bit ADC (‘F330/2/4 only)

●      • Up to 200 ksps

●      • Up to 16 external single-ended or differential inputs

●      • VREF from internal VREF, external pin or VDD

●      • Internal or external start of conversion source

●      • Built-in temperature sensor

●   - 10-Bit Current Output DAC (‘F330 only)

●   - Comparator

●       • Programmable hysteresis and response time

●       • Configurable as interrupt or reset source

●       • Low current (0.4 µA)

●On-Chip Debug

●   - On-chip debug circuitry facilitates full speed, nonintrusive in-system debug (no emulator required)

●   - Provides breakpoints, single stepping, inspect/modify memory and registers

●   - Superior performance to emulation systems using ICE-chips, target pods, and sockets

●   - Low cost, complete development kit

●Supply Voltage 2.7 to 3.6 V

●   - Typical operating current: 6.4 mA at 25 MHz;

●                                 9 µA at 32 kHz

●   - Typical stop mode current: 0.1 µA

●Temperature Range: –40 to +85 °C

●High Speed 8051 µC Core

●   - Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks

●   - Up to 25 MIPS throughput with 25 MHz clock

●   - Expanded interrupt handler Memory

●   - 768 bytes internal data RAM (256 + 512)

●   - 8 kB (‘F330/1), 4 kB (‘F332/3), or 2 kB (‘F334/5) Flash; In-system programmable in 512-byte Sectors—512 bytes are reserved in the 8 kB devices

●Digital Peripherals

●   - 17 Port I/O; All 5 V tolerant with high sink current

●   - Hardware enhanced UART, SMBus™, and enhanced SPI™ serial ports

●   - Four general purpose 16-bit counter/timers

●   - 16-Bit programmable counter array (PCA) with three capture/compare modules

●   - Real time clock mode using PCA or timer and external clock source

●Clock Sources

●   - Two internal oscillators:

●      • 24.5 MHz with ±2% accuracy supports crystal-less UART operation

●      • 80/40/20/10 kHz low frequency, low power

●   - External oscillator: Crystal, RC, C, or clock (1 or 2 pin modes)

●   - Can switch between clock sources on-the-fly; useful in power saving modes

●20-Pin QFN Package