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CD4071 Datasheet PDF

Part Series:	CD4071 Series
Category:	Logic Gates
Description:	OR Gate 4Element 2IN CMOS 14Pin PDIP Tube
Document:	CD4071BE Datasheet PDF (31 Pages)

CD4071 Logic Gates Datasheet PDF

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Datasheet PDF (31 Pages)

6.1

TI

#2

Datasheet PDF (31 Pages)

4.6

TI

#3

Datasheet PDF (31 Pages)

4.3

TI

#4

Datasheet PDF (31 Pages)

2.9

TI

CD4071 Datasheet PDF Logic Gates

31 Pages

TI

OR Gate 4Element 2IN CMOS 14Pin TSSOP Tube

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TI

OR Gate 4Element 2IN CMOS 14Pin CDIP Tube

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TI

OR Gate 4Element 2IN CMOS 14Pin SOP T/R

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TI

OR Gate 4Element 2IN CMOS 14Pin SOIC T/R

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TI

OR Gate 4Element 2IN CMOS 14Pin CDIP Tube

31 Pages

TI

OR Gate 4Element 2IN CMOS 14Pin TSSOP Tube

31 Pages

TI

OR Gate 4Element 2IN CMOS 14Pin PDIP Tube

31 Pages

TI

OR Gate 4Element 2IN CMOS 14Pin SOP T/R

31 Pages

Fairchild

OR Gate 4Element 2IN CMOS 14Pin PDIP Rail

31 Pages

Fairchild

OR Gate 4Element 2IN CMOS 14Pin SOIC N T/R

31 Pages

TI

OR Gate 4Element 2IN CMOS 14Pin TSSOP T/R

31 Pages

TI

OR Gate 4Element 2IN CMOS 14Pin SOIC Tube

31 Pages

Fairchild

OR Gate 4Element 2IN CMOS 14Pin SOIC N Rail

31 Pages

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OR Gate 4Element 2IN CMOS 14Pin SOIC T/R

30 Pages

TI

IC QUAD 2INPUT OR GATE 14-SOIC

30 Pages

TI

IC QUAD 2INPUT OR GATE 14-TSSOP

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CD4071BE - TI Specifications

TYPE

DESCRIPTION

Mounting Style

Through Hole

Number of Pins

14 Pin

Supply Voltage (DC)

3.00V ~ 18.0V

Operating Voltage

3V ~ 18V

Case/Package

PDIP-14

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CD4071BE - TI Function Overview

●The CD4071BE is a CMOS quad two input OR gate in 14 pin DIP package. It provides system designers with direct implementation of positive logic OR functions and supplements of CMOS gates.

● Supply voltage range from 3V to 18V

● 100% tested for quiescent current at 20V

● Maximum input current of 1µA at 18V (full package temperature range) and 100nA at 18V (25°C)

● Standardized, symmetrical output characteristics

● 5V, 10V and 15V parametric ratings

● Meets all requirements of JEDEC tentative standard JESD 13B

● Operating temperature range -55°C to 125°C

● Noise margin (full package temperature range) of 2.5V at VDD=15V

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