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GAL16V8 Datasheet PDF

Part Series:GAL16V8 Series
Category:CPLDs
Description:SPLD GAL Family 8 Macro Cells 41.6MHz 5V 20Pin PDIP
Document:GAL16V8D-15LJN Datasheet PDF (27 Pages)

GAL16V8 CPLDs Datasheet PDF

#1
GAL16V8D-15LJN
3.1
Lattice Semiconductor
#2
GAL16V8D-5LJN
2.5
Lattice Semiconductor
#3
GAL16V8D-15LPN
2.3
Lattice Semiconductor
#4
GAL16V8D-10LJI
2.2
Lattice Semiconductor

GAL16V8 Datasheet PDF CPLDs

27 Pages
Lattice Semiconductor
Programmable Logic Device 8 Macro Cells 125MHz 5V 20Pin PLCC
27 Pages
Lattice Semiconductor
Programmable Logic Device 8 Macro Cells 83.3MHz 5V 20Pin PDIP
27 Pages
Lattice Semiconductor
Programmable Logic Device 8 Macro Cells 125MHz 5V 20Pin PDIP
27 Pages
Lattice Semiconductor
SPLD GAL Family 8 Macro Cells 41.6MHz 5V 20Pin PLCC
26 Pages
Lattice Semiconductor
SPLD GAL Family 8 Macro Cells 41.6MHz 5V 20Pin PDIP
26 Pages
Lattice Semiconductor
Programmable Logic Device 8 Macro Cells 62.5MHz 5V 20Pin PLCC
26 Pages
Lattice Semiconductor
Programmable Logic Device 8 Macro Cells 125MHz 5V 20Pin PLCC
26 Pages
Lattice Semiconductor
Programmable Logic Device 8 Macro Cells 62.5MHz 5V 20Pin PLCC
26 Pages
Lattice Semiconductor
Programmable Logic Device 8 Macro Cells 83.3MHz 5V 20Pin PLCC
26 Pages
Lattice Semiconductor
Programmable Logic Device 8 Macro Cells 62.5MHz 5V 20Pin PDIP
26 Pages
Lattice Semiconductor
Programmable Logic Device 8 Macro Cells 83.3MHz 5V 20Pin PLCC
26 Pages
Lattice Semiconductor
Programmable Logic Device 8 Macro Cells 83.3MHz 5V 20Pin PDIP
26 Pages
Lattice Semiconductor
PLD; Programmable AND-Array Logic; 20Pin PDIP; -0.5 to V; 75mA; 0.8V, 25nS
26 Pages
Lattice Semiconductor
Programmable Logic Device 8 Macro Cells 125MHz 5V 20Pin PDIP
26 Pages
Lattice Semiconductor
Programmable Logic Device 8 Macro Cells 83.3MHz 5V 20Pin PDIP
26 Pages
Lattice Semiconductor
Programmable Logic Device 8 Macro Cells 166MHz 5V 20Pin PLCC

GAL16V8D-25LP - Lattice Semiconductor Specifications

TYPE
DESCRIPTION
Mounting Style
Through Hole
Frequency
41.6 MHz
Number of Pins
20 Pin
Case/Package
DIP-20
Supply Current
90 mA
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GAL16V8D-25LP - Lattice Semiconductor Function Overview

Description
The GAL16V8, at 3.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (<100ms) allow the devices to be reprogrammed quickly and efficiently.
Features
•HIGH PERFORMANCE E2CMOS®TECHNOLOGY
—3.5 ns Maximum Propagation Delay
—Fmax = 250 MHz
—3.0 ns Maximum from Clock Input to Data Output
—UltraMOS® Advanced CMOS Technology
•50% to 75% REDUCTION IN POWER FROM BIPOLAR
—75mA Typ Icc on Low Power Device
—45mA Typ Icc on Quarter Power Device
•ACTIVE PULL-UPS ON ALL PINS
•E2CELL TECHNOLOGY
—Reconfigurable Logic
—Reprogrammable Cells
—100% Tested/100% Yields
—High Speed Electrical Erasure (<100ms)
—20 Year Data Retention
•EIGHT OUTPUT LOGIC MACROCELLS
—Maximum Flexibility for Complex Logic Designs
—Programmable Output Polarity
—Also Emulates 20-pin PAL® Devices with Full Function/Fuse Map/Parametric Compatibility
•PRELOAD AND POWER-ON RESET OF ALL REGISTERS
—100% Functional Testability
•APPLICATIONS INCLUDE:
—DMA Control
—State Machine Control
—High Speed Graphics Processing
—Standard Logic Speed Upgrade
•ELECTRONIC SIGNATURE FOR IDENTIFICATION
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