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SN74HC138 Datasheet PDF

Part Series:SN74HC138 Series
Description:3-Line To 8-Line Decoders/Demultiplexers
Document:SN74HC138DR Datasheet PDF (30 Pages)

SN74HC138 Datasheet PDF

30 Pages
TI
TEXAS INSTRUMENTS SN74HC138NSR Decoder / Demultiplexer, HC Family, 8 Output, 2V to 6V, SOP-16
30 Pages
TI
TEXAS INSTRUMENTS SN74HC138PW Decoder / Demultiplexer, HC Family, 8 Output, 5.2mA, 2V to 6V, TSSOP-16
30 Pages
TI
TEXAS INSTRUMENTS SN74HC138PWRG4 Decoder / Demultiplexer, HC Family, 8 Output, 2V to 6V, TSSOP-16
30 Pages
TI
TEXAS INSTRUMENTS SN74HC138DBR Decoder / Demultiplexer, HC Family, 8 Output, 2V to 6V, SSOP-16
30 Pages
TI
TEXAS INSTRUMENTS SN74HC138DRG4 Decoder / Demultiplexer, HC Family, 8 Output, 2V to 6V, SOIC-16
30 Pages
TI
TEXAS INSTRUMENTS SN74HC138PWT Decoder / Demultiplexer, HC Family, 8 Output, 25mA, 2V to 6V, TSSOP-16
30 Pages
TI
TEXAS INSTRUMENTS SN74HC138DT Decoder / Demultiplexer, HC Family, 8 Output, 2V to 6V, SOIC-16
30 Pages
TI
Decoder/Demultiplexer Single 3-to-8 16Pin SOIC Tube
30 Pages
TI
TEXAS INSTRUMENTS SN74HC138DE4 Decoder / Demultiplexer, HC Family, 8 Output, 2V to 6V, SOIC-16
30 Pages
TI
Decoder/Demultiplexer Single 3-to-8 16Pin SOIC T/R
30 Pages
TI
Decoder/Demultiplexer Single 3-to-8 16Pin TSSOP T/R
30 Pages
TI
TEXAS INSTRUMENTS SN74HC138PWG4 Decoder / Demultiplexer, HC Family, 8 Output, 2V to 6V, TSSOP-16
30 Pages
TI
3-Line To 8-Line Decoders/Demultiplexers
14 Pages
TI
Decoder/Demultiplexer Single 3-to-8 Automotive 16Pin SOIC T/R
14 Pages
TI
Decoder/Demultiplexer Single 3-to-8 16Pin TSSOP T/R
14 Pages
TI
Decoder/Demultiplexer Single 3-to-8 Automotive 16Pin TSSOP T/R

SN74HC138 - TI Specifications

TYPE
DESCRIPTION
Case/Package
DIP-14
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SN74HC138 - TI Function Overview

The SNx4HC138 devices are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When employed with high-speed memories using a fast enable circuit, the delay times of these decoders and the enable time of the memory are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible.
Targeted Specifically for High-Speed Memory Decoders and Data-Transmission Systems
Wide Operating Voltage Range (2 V to 6 V)
Outputs Can Drive Up To 10 LSTTL Loads
Low Power Consumption, 80-µA Maximum ICC
Typical tpd = 15 ns
±4-mA Output Drive at 5 V
Low Input Current of 1-µA Maximum
Active Low Outputs ( Selected Output is Low)
Incorporate Three Enable Inputs to Simplify Cascading or Data Reception
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