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TJA1021 Datasheet PDF

Part Series:TJA1021 Series
Category:Interface ICs
Description:TJA Series 5.5 to 27 Vbat 4mA 20 kBd LIN 2.1/SAE J2602 Transceiver -SOIC-8
Document:TJA1021T/10/C,118 Datasheet PDF (26 Pages)

TJA1021 Datasheet PDF Interface ICs

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TJA1021T/20/C,118 - NXP Specifications

TYPE
DESCRIPTION
Mounting Style
Surface Mount
Number of Pins
8 Pin
Case/Package
SOIC-8
Supply Current
4 mA
Number of Positions
8 Position
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TJA1021T/20/C,118 - NXP Function Overview

Overview
The TJA1021 is the interface between the Local Interconnect Network (LIN) master/slave protocol controller and the physical bus in a LIN. It is primarily intended for in-vehicle sub-networks using baud rates from 1 kBd up to 20 kBd and is LIN 2.1/SAE J2602 compliant. The TJA1021 is pin-to-pin compatible with the TJA1020 with an improved ElectroStatic Discharge (ESD) specification.
The transmit data stream of the protocol controller at the transmit data input (TXD) is converted by the TJA1021 into a bus signal with optimized slew rate and wave shaping to minimize ElectroMagnetic Emission (EME). The LIN bus output pin is pulled HIGH via an internal termination resistor. For a master application, an external resistor in series with a diode should be connected between pin INH or pin VBAT and pin LIN. The receiver detects the data stream at the LIN bus input pin and transfers it via pin RXD to the microcontroller.
In Sleep mode, the power consumption of the TJA1021 is very low. In failure modes, the power consumption is reduced to a minimum.
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## Features
2.1 General
LIN 2.1/SAE J2602 compliant
Baud rate up to 20 kBd
Very low ElectroMagnetic Emission (EME)
High ElectroMagnetic Immunity (EMI)
Passive behavior in unpowered state
Input levels compatible with 3.3 V and 5 V devices
Integrated termination resistor for LIN slave applications
Wake-up source recognition (local or remote)
K-line compatible
Pin-to-pin compatible with TJA1020
Available in SO8 and HVSON8 packages
Leadless HVSON8 package (3.0 mm × 3.0 mm) with improved Automated Optical Inspection (AOI) capability
2.2 Low power management
Very low current consumption in Sleep mode with local and remote wake-up
2.3 Protection mechanisms
High ESD robustness: ±6 kV according to IEC 61000-4-2 for pins LIN, VBAT and WAKE_N
Transmit data (TXD) dominant time-out function
Bus terminal and battery pin protected against transients in the automotive environment (ISO 7637)
Bus terminal short-circuit proof to battery and ground
Thermally protected
## Features
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