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XC95144 Datasheet PDF

Part Series:XC95144 Series
Category:CPLDs
Description:CPLD XC9500 Family 3.2K Gates 144 Macro Cells 100MHz 0.35um, CMOS Technology 3.3V 100Pin TQFP
Document:XC95144XL-10TQG100I Datasheet PDF (29 Pages)

XC95144 CPLDs Datasheet PDF

#1
XC95144XL-10TQG100I
3.4
Xilinx
#2
XC95144XL-7TQ100I
2.4
Xilinx
#3
XC95144XL-10TQG100C
4.8
Xilinx
#4
XC95144XL-10TQG144C
4.0
Xilinx

XC95144 Datasheet PDF CPLDs

Datasheet PDF
18 Pages
Xilinx
CPLD XC9500 Family 3.2K Gates 144 Macro Cells 125MHz 0.35um, CMOS Technology 3.3V 100Pin TQFP
Datasheet PDF
18 Pages
Xilinx
CPLD XC9500 Family 3.2K Gates 144 Macro Cells 178.6MHz 0.35um, CMOS Technology 3.3V 100Pin TQFP
Datasheet PDF
18 Pages
Xilinx
CPLD XC9500 Family 3.2K Gates 144 Macro Cells 100MHz 0.35um, CMOS Technology 3.3V 144Pin TQFP
Datasheet PDF
18 Pages
Xilinx
CPLD XC9500 Family 3.2K Gates 144 Macro Cells 125MHz 0.35um, CMOS Technology 3.3V 144Pin TQFP
Datasheet PDF
18 Pages
Xilinx
CPLD XC9500 Family 3.2K Gates 144 Macro Cells 100MHz 0.35um, CMOS Technology 3.3V 100Pin TQFP
Datasheet PDF
18 Pages
Xilinx
CPLD XC9500 Family 3.2K Gates 144 Macro Cells 125MHz 0.35um, CMOS Technology 3.3V 100Pin TQFP
Datasheet PDF
18 Pages
Xilinx
CPLD XC9500 Family 3.2K Gates 144 Macro Cells 178.6MHz 0.35um, CMOS Technology 3.3V 144Pin TQFP
Datasheet PDF
18 Pages
Xilinx
CPLD XC9500 Family 3.2K Gates 144 Macro Cells 125MHz 0.35um, CMOS Technology 3.3V 144Pin TQFP
Datasheet PDF
18 Pages
Xilinx
CPLD XC9500 Family 3.2K Gates 144 Macro Cells 125MHz 0.35um, CMOS Technology 3.3V 144Pin TQFP
Datasheet PDF
18 Pages
Xilinx
CPLD XC9500 Family 3.2K Gates 144 Macro Cells 125MHz 0.35um, CMOS Technology 3.3V 100Pin TQFP
Datasheet PDF
18 Pages
Xilinx
CPLD XC9500 Family 3.2K Gates 144 Macro Cells 125MHz 0.35um, CMOS Technology 3.3V 144Pin TQFP
Datasheet PDF
18 Pages
Xilinx
CPLD XC9500 Family 3.2K Gates 144 Macro Cells 178.6MHz 0.35um, CMOS Technology 3.3V 144Pin TQFP
Datasheet PDF
18 Pages
Xilinx
CPLD XC9500 Family 3.2K Gates 144 Macro Cells 100MHz 0.35um, CMOS Technology 3.3V 100Pin TQFP
Datasheet PDF
18 Pages
Xilinx
CPLD XC9500 Family 3.2K Gates 144 Macro Cells 100MHz 0.35um, CMOS Technology 3.3V 144Pin TQFP
Datasheet PDF
18 Pages
Xilinx
CPLD XC9500 Family 3.2K Gates 144 Macro Cells 178.6MHz 0.35um, CMOS Technology 3.3V 100Pin TQFP
Datasheet PDF
12 Pages
Xilinx
CPLD XC9500 Family 3.2K Gates 144 Macro Cells 66.7MHz 0.5um (CMOS) Technology 5V 100Pin TQFP
More XC95144 Datasheet PDF >

XC95144XL-10TQG100C - Xilinx Specifications

TYPE
DESCRIPTION
Mounting Style
Surface Mount
Frequency
100 MHz
Number of Pins
100 Pin
Supply Voltage (DC)
3.00V (min)
Case/Package
TQFP-100
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XC95144XL-10TQG100C - Xilinx Function Overview

●The XC95144XL-10TQG100C is a high-performance Flash CPLD IC targeted for high-performance, low-voltage applications. It is comprised of eight 54V18 function blocks, providing 3200 usable gates with propagation delays of 5ns. Power dissipation in CPLDs can vary substantially depending on the system frequency, design application and output loading. To help reduce power dissipation, each macro cell in a XC9500XL device may be configured for low-power mode (from the default high-performance mode). In addition, unused product-terms and macro cells are automatically deactivated by the software to further conserve power.
● Fast concurrent programming
● Slew rate control on individual outputs
● Enhanced data security
● Excellent quality and reliability
● 0 to 70°C Operating temperature range
●ESD sensitive device, take proper precaution while handling the device.
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