74AHC594D,112 Datasheet PDF - Nexperia

The 74AHC594D is a 8-bit Si-gate CMOS Shift Register with output register. It is pin compatible with low-power Schottky TTL (LSTTL). This non-inverting serial-in parallel-out shift register feeds an 8-bit D-type storage register. Separate clocks (SHCP and STCP) and direct overriding clears (SHR\ and STR\\) are provided on both the shift and storage registers. A serial output (Q7S) is provided for cascading purposes. Both the shift and storage register clocks are positive-edge triggered. If the user wishes to connect both clocks together, the shift register will always be one count pulse ahead of the storage register.

● Balanced propagation delays

● All inputs have Schmitt-trigger actions

● Inputs accept voltages higher than VCC

● Independent direct overriding clears on shift and storage registers

● Independent clocks for shift and storage registers

● Latch-up performance exceeds 100mA per JESD78 class II

● CMOS Input level

● Complies with JEDEC standard No. 7A