| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 8 Pin |
| Supply Voltage (DC) | 3.60V (max) |
| Case/Package | TSSOP-8 |
| Number of Circuits | 1 Circuit |
| Number of Channels | 2 Channel |
| Number of Positions | 8 Position |
| Operating Temperature (Max) | 125 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Supply Voltage (Max) | 3.6 V |
| Supply Voltage (Min) | 0.8 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tape & Reel (TR) |
| Size-Height | 0.95 mm |
| Operating Temperature | -40℃ ~ 125℃ (TA) |
The 74AVC2T45DP,125 is a dual-bit dual-supply Voltage Level Translator/Transceiver that enables bidirectional level translation. It features two data input-output ports, a direction control input and dual-supply pins. Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8 and 3.6V making the device suitable for translating between any of the low voltage nodes. Pins nA and DIR are referenced to VCC(A) and pins nB are referenced to VCC(B). A HIGH on DIR allows transmission from nA to nB and a LOW on DIR allows transmission from nB to nA. The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In Suspend mode when either VCC(A) or VCC(B) are at GND level, both A and B are in the high-impedance OFF-state.
● High noise immunity
● Suspend mode
● IOFF circuitry provides partial power-down mode operation
● Complies with JEDEC standards
● Latch-up performance exceeds 100mA per JESD 78 class II
● Inputs accept voltages up to 3.6V
● Low noise overshoot and undershoot <10% of VCC
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