| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 16 Pin |
| Capacitance | 3.5 pF |
| Case/Package | TSSOP-16 |
| Supply Current | 16 µA |
| Number of Circuits | 3 Circuit |
| Number of Channels | 6 Channel |
| Number of Positions | 16 Position |
| Power Dissipation | 500 mW |
| Bandwidth | 170 MHz |
| Operating Temperature (Max) | 125 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| 3dB Bandwidth | 170 MHz |
| Power Dissipation (Max) | 500 mW |
| Supply Voltage | 2V ~ 10V |
| Supply Voltage (Max) | 10 V |
| Supply Voltage (Min) | 2 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tape & Reel (TR) |
| Size-Length | 5.1 mm |
| Size-Width | 4.5 mm |
| Size-Height | 0.95 mm |
| Operating Temperature | -40℃ ~ 125℃ |
The 74HC4053PW is a triple single-pole double-throw (3x SPDT) Analog Switch suitable for use in analog or digital 2:1 multiplexer/demultiplexer applications. Each switch features a digital select input (Sn), two independent inputs/outputs (nY0 and nY1) and a common input/output (nZ). A digital enable input (E) is common to all switches. When E is high, the switches are turned off. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
● Low ON resistance - 80R, 70R, 60R (typical) at VCC-VEE = 4.5V, 6.0V, 9.0V respectively
● Logic level translation to enable 5V logic to communicate with ±5V analog signals
● Typical break before make built-in
● Complies with JEDEC standard No. 7A
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