TYPE | DESCRIPTION |
---|
Number of Pins | 20 Pin |
Case/Package | SOIC |
Number of Positions | 20 Position |
Number of Bits | 8 Bit |
Operating Temperature (Max) | 125 ℃ |
Operating Temperature (Min) | -40 ℃ |
Supply Voltage (Max) | 6 V |
Supply Voltage (Min) | 2 V |
TYPE | DESCRIPTION |
---|
Packaging | Bulk |
Size-Height | 2.45 mm |
The 74HC563D is an octal CMOS transparent D Latch pin compatible with low power Schottky TTL (LSTTL). The 74HC563 is octal D-type transparent latches featuring separate D-type inputs for each latch and inverting 3-state outputs for bus oriented applications. A LE input and an OE\ input are common to all latches. It consists of eight D-type transparent latches with 3-state inverting outputs. The LE and OE\ are common to all latches. When LE is high, data at the Dn inputs enter the latches. In this condition the latches are transparent, i.e. a latch output will change state each time its corresponding D-input changes. When LE is low the latches store the information that was present at the D-inputs a set-up time preceding the high-to-low transition of LE. When OE\ is low, the contents of the 8 latches are available at the outputs.
● 3-state inverting outputs for bus oriented applications
● Inputs and outputs on opposite sides of package allowing easy interface with microprocessor
● Common 3-state output enable input
● Output capability - Bus driver
● Complies with JEDEC standard No. 7A
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