| TYPE | DESCRIPTION |
|---|
| Case/Package | DIP |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Unknown |
General description
●The 74HC73 is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL). The 74HC73 is specified in compliance with JEDEC standard no. 7A.
●Features
●Low-power dissipation
●Complies with JEDEC standard no. 7A
●ESD protection:
● ◆HBM EIA/JESD22-A114-B exceeds 2000 V
● ◆MM EIA/JESD22-A115-A exceeds 200 V.
●Multiple package options
●Specified from−40°Cto+80°C and from−40°C to +125°C.
Philips
16 Pages / 0.17 MByte
NXP
Dual JK flip-flop with reset; negative-edge trigger
NXP
NXP 74HC73D,652, Dual, J-K Type Flip Flop, 2 → 6V, 14Pin SOIC
Nexperia
IC JK TYPE NEG TRG DUAL 14SOIC
NXP
Flip Flop JK-Type Neg-Edge 2Element 14Pin PDIP Bulk
Nexperia
IC JK TYPE NEG TRG DUAL 14SOIC
NXP
Flip Flop JK-Type Neg-Edge 2Element 14Pin TSSOP T/R
Nexperia
IC JK TYPE NEG TRG DUAL 14TSSOP
NXP
Flip Flop JK-Type Neg-Edge 2Element 14Pin SSOP Bulk
NXP
Flip Flop JK-Type Neg-Edge 2Element 14Pin SSOP T/R
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