| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Frequency | 76 MHz |
| Number of Pins | 14 Pin |
| Supply Voltage (DC) | 2.00V (min) |
| Case/Package | TSSOP-14 |
| Number of Outputs | 1 Output |
| Output Current | 25 mA |
| Number of Circuits | 2 Circuit |
| Number of Positions | 14 Position |
| Clock Speed | 82 MHz |
| Number of Bits | 2 Bit |
| Input Capacitance | 3.5 pF |
| Number of Inputs | 1 Input |
| Operating Temperature (Max) | 125 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Supply Voltage | 2V ~ 6V |
| Supply Voltage (Max) | 6 V |
| Supply Voltage (Min) | 2 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Cut Tape (CT) |
| Size-Height | 0.95 mm |
| Operating Temperature | -40℃ ~ 125℃ (TA) |
The 74HC74PW is a dual positive edge-trigger D-type Flip-flop with set and reset. It has individual data (nD), clock (nCP), set (nSD\\) and reset (nRD\\) inputs and complementary nQ and nQ\ outputs. Data at the nD-input, that meets the set-up and hold time requirements on the low-to-high clock transition, is stored in the flip-flop and appears at the nQ output. Schmitt-trigger action in the clock input, makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.
● Symmetrical output impedance
● Low power dissipation
● High noise immunity
● Balanced propagation delays
● Specified in Complies with JEDEC standard No. 7A
● CMOS Input levels
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