| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Frequency | 76 MHz |
| Number of Pins | 14 Pin |
| Supply Voltage (DC) | 1.00V (min) |
| Case/Package | SOIC |
| Output Current | 12 mA |
| Number of Positions | 14 Position |
| Number of Bits | 2 Bit |
| Polarity | Non-Inverting, Inverting |
| Number of Gates | 2 Gate |
| Number of Inputs | 1 Input |
| Operating Temperature (Max) | 125 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Supply Voltage | 3.3 V |
| Supply Voltage (Max) | 5.5 V |
| Supply Voltage (Min) | 1 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Unknown |
| Packaging | Each |
| Size-Length | 8.75 mm |
| Size-Width | 4 mm |
| Size-Height | 1.45 mm |
| Operating Temperature | -40℃ ~ 125℃ |
The 74LV74D is a dual positive-edge trigger D-type Flip-flop with set and reset. It has individual data (nD) inputs, clock (nCP) inputs, set (nSD\\) and (nRD\\) inputs and complementary nQ and nQ\ outputs. The set and reset are asynchronous active low inputs that operate independently of the clock input. Information on the data input is transferred to the nQ output on the low-to-high transition of the clock pulse. The nD inputs must be stable one set-up time prior to the low-to-high clock transition, for predictable operation. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.
● Direct interface with TTL levels
● Optimized for low voltage applications
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