74LVC4245AD,118 Datasheet PDF - NXP

The 74LVC4245AD,118 is an octal dual supply Translating Transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. It is designed to interface between a 3 and 5V bus in a mixed 3 and 5V supply environment. The device features an output enable input (pin OE) for easy cascading and a send/receive input (pin DIR) for direction control. Pin OE controls the outputs so that the buses are effectively isolated. In suspend mode, when VCC(A) is zero, there will be no current flow from one supply to the other supply. The A-outputs must be set 3-state and the voltage on the A-bus must be smaller than Vdiode.

● CMOS low-power consumption

● Direct interface with TTL levels

● 5V Tolerant inputs/outputs, for interfacing with 5V logic

● Complies with JEDEC standard no. JESD8B/JESD36

● High-impedance when VCC(A) = 0V

● Inputs accept voltages up to 5.5V