| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 24 Pin |
| Case/Package | TSSOP-24 |
| Number of Outputs | 2 Output |
| Supply Current | 300 µA |
| Number of Channels | 2 Channel |
| Number of Positions | 24 Position |
| Number of Bits | 10 Bit |
| Power Dissipation | 2.25 mW |
| Sample Rate | 143 ksps |
| Resolution (Bits) | 10.0 Bit |
| Operating Temperature (Max) | 105 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Power Dissipation (Max) | 2.25 mW |
| Number of DACs | 2 DAC |
| Supply Voltage | 2.5V ~ 5.5V |
| Supply Voltage (Max) | 5.5 V |
| Supply Voltage (Min) | 2.5 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tube |
| Size-Length | 7.8 mm |
| Size-Width | 4.4 mm |
| Size-Height | 1.05 mm |
| Operating Temperature | -40℃ ~ 105℃ |
The AD5333BRUZ is a dual 10-bit Digital-to-analog Converter (DAC) operates from a 2.5 to 5.5V supply, consuming just 230µA at 3V and feature a power-down pin, PD that further reduces the current to 80nA. This device incorporates an on-chip output buffer that can drive the output to both supply rails, while the AD5333 allows a choice of buffered reference input. It has a parallel interface. CS selects the device and data is loaded into the input registers on the rising edge of WR. The GAIN pin on the AD5333 allows the output range to be set at 0V to VREF or 0V to 2 x VREF. Input data to the DACs is double-buffered, allowing simultaneous update of multiple DACs in a system using the LDAC pin. An asynchronous CLR input is also provided, which resets the contents of the Input Register and the DAC Register to all zeros. This device also incorporates a power-on reset circuit that ensures that the DAC output powers on to 0V and remains there until valid data is written to the device.
● Guaranteed monotonic by design over all codes
● Low power parallel data interface
● On-chip rail-to-rail output buffer amplifiers
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