| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 6 Pin |
| Supply Voltage (DC) | 1.60V (min) |
| Case/Package | SOT-23-6 |
| Supply Current | 300 µA |
| Number of Circuits | 1 Circuit |
| Number of Channels | 1 Channel |
| Number of Positions | 6 Position |
| Number of Bits | 12 Bit |
| Power Dissipation | 0.9 W |
| Sample Rate | 200 ksps |
| Resolution (Bits) | 12.0 Bit |
| Input Capacitance | 20.0 pF |
| Number of ADCs | 1 ADC |
| Number of Inputs | 1 Input |
| Operating Temperature (Max) | 85 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Power Dissipation (Max) | 0.9 mW |
| Number of Input Channels | 1 Channel |
| Supply Voltage | 1.6V ~ 3.6V |
| Supply Voltage (Max) | 3.6 V |
| Supply Voltage (Min) | 1.6 V |
| Input Voltage | 3.6 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tape & Reel (TR) |
| Size-Length | 2.9 mm |
| Size-Width | 1.6 mm |
| Size-Height | 1.3 mm |
| Operating Temperature | -40℃ ~ 85℃ |
The AD7466BRTZ-R2 is a 12-bit high speed, low power successive approximation Analog-to-digital Converter (ADC) contains a low noise, wide bandwidth track-and-hold amplifier, which can handle input frequencies in excess of 3MHz. The conversion process and data acquisition are controlled using CS and the serial clock, allowing the devices to interface with microprocessors or DSPs. The input signal is sampled on the falling edge of CS and the conversion is also initiated at this point. There are no pipeline delays associated with the part. The reference for the part is taken internally from VDD. This allows the widest dynamic input range to the ADC. Thus, the analog input range for the part is 0V to VDD. The conversion rate is determined by the SCLK.
● Flexible power/serial clock speed management
● No pipeline delays
● High speed serial interface SPI™/QSPI™/MICROWIRE™/DSP compatible
● Automatic power-down
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