| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 24 Pin |
| Supply Voltage (DC) | 4.75V (min) |
| Case/Package | TSSOP-24 |
| Supply Current | 1.75 mA |
| Number of Circuits | 1 Circuit |
| Number of Channels | 4 Channel |
| Number of Positions | 24 Position |
| Number of Bits | 16 Bit |
| Power Dissipation | 3.75 mW |
| Sample Rate | 105 SPS |
| Resolution (Bits) | 16.0 Bit |
| Input Impedance | 2.50 GΩ |
| Number of ADCs | 1 ADC |
| Number of Inputs | 2, 4 Input |
| Operating Temperature (Max) | 85 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Power Dissipation (Max) | 8.8 mW |
| Number of Input Channels | 2, 4 Channel |
| Supply Voltage (Max) | 5.25 V |
| Supply Voltage (Min) | 2.7 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Each |
| Size-Length | 7.8 mm |
| Size-Width | 4.4 mm |
| Size-Height | 1.05 mm |
| Operating Temperature | -40℃ ~ 85℃ |
The AD7709BRUZ is a complete analog front end sigma-delta Analog-to-digital Converter (ADC) with switchable current sources. It is suitable for use with the low frequency measurement applications. It contains a 16-bit ADC, selectable reference inputs, three switchable matched excitation current sources, low-side power switches and a digital I/O port. The 16-bit channel with PGA accepts fully differential, uni-polar and bipolar input signal ranges from 1.024 REFIN/128 to 1.024 REFIN. It can be configured as two fully differential input channels or four pseudo-differential input channels. Signals can be converted directly from a transducer without the need for signal conditioning. The device operates from a 32.768kHz crystal with an on-chip PLL generating the required internal operating frequency. The output data rate from the part is software programmable. The p-p resolution from the part varies with the programmed gain and output data rate.
● Programmable gain front end
● VREF Select™ Allows absolute and ratiometric measurement capability
● 3-wire serial SPI®/QSPI™/MICROWIRE™/DSP compatible Schmitt trigger on SCLK
● Rail-to-rail input buffer and PGA
● Low-side power switches
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