| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 32 Pin |
| Case/Package | LFCSP-32 |
| Number of Outputs | 1 Output |
| Supply Current | 7.67 mA |
| Number of Positions | 32 Position |
| Number of Bits | 14 Bit |
| Power Dissipation | 96.5 mW |
| Sample Rate | 180 Msps |
| Resolution (Bits) | 14.0 Bit |
| Operating Temperature (Max) | 85 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Power Dissipation (Max) | 96.54 mW |
| Number of DACs | 1 DAC |
| Supply Voltage | 1.8V ~ 3.3V |
| Supply Voltage (Max) | 3.3 V |
| Supply Voltage (Min) | 1.8 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tray |
| Size-Length | 5.1 mm |
| Size-Width | 5.1 mm |
| Size-Height | 0.75 mm |
| Operating Temperature | -40℃ ~ 85℃ |
The AD9102BCPZ is a low power 14-bit Digital-to-analog Converter (DAC) integrating on-chip pattern memory for complex waveform generation with a direct digital synthesizer (DDS). The DDS is a 14-bit output, up to 180MSPS master clock sine wave generator with a 24-bit tuning word allowing 10.8Hz/LSB frequency resolution. SRAM data can include directly generated stored waveforms, amplitude modulation patterns applied to DDS outputs or DDS frequency tuning words. An internal pattern control state machine lets the user program the pattern period for the DAC as well the start delay within the pattern period for the signal output on the DAC. A SPI interface is used to configure the digital waveform generator and load patterns into the SRAM. A gain adjustment factor and an offset adjustment are applied to the digital signal on their way into the DAC. The AD9102 offers exceptional AC and DC performance and supports DAC sampling rates of up to 180MSPS.
● On-chip 4096 x 14-bit pattern memory
● SFDR to Nyquist
● High integration
● Low power
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