AD9629BCPZ-65 Datasheet PDF - ADI

The AD9629BCPZ-65 is a monolithic Analog-to-digital Converter (ADC) features a high performance sample-and-hold circuit and on-chip voltage reference. The product uses multistage differential pipeline architecture with output error correction logic to provide 12-bit accuracy at 80MSPS data rates and to guarantee no missing codes over the full operating temperature range. The ADC contains several features designed to maximize flexibility such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface. A data output clock is provided to ensure proper latch timing with receiving logic. Both 1.8 and 3.3V CMOS levels are supported.

● Differential input with 700MHz bandwidth

● On-chip voltage reference and sample-and-hold circuit

● Offset binary, gray code or twos complement data format

● Integer 1, 2 or 4 input clock divider

● Built-in selectable digital test pattern generation

● Energy-saving power-down modes

● Data clock out with programmable clock and data alignment