| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Frequency | 7.5 GHz |
| Number of Pins | 16 Pin |
| Supply Voltage (DC) | 2.38V (min) |
| Case/Package | LFCSP-16 |
| Number of Outputs | 2 Output |
| Number of Circuits | 1 Circuit |
| Number of Positions | 16 Position |
| Operating Temperature (Max) | 125 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Supply Voltage | 2.375V ~ 3.63V |
| Supply Voltage (Max) | 3.63 V |
| Supply Voltage (Min) | 2.375 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tape & Reel (TR) |
| Size-Length | 3 mm |
| Size-Width | 3 mm |
| Size-Height | 0.83 mm |
| Operating Temperature | -40℃ ~ 125℃ |
The ADCLK925BCPZ-R7 is an ultrafast SiGe ECL Clock/Data Buffer fabricated on the Analog Devices, Inc., proprietary XFCB3 silicon germanium (SiGe) bipolar process. The ADCLK905 feature full-swing emitter coupled logic (ECL) output drivers. For PECL (positive ECL) operation, bias VCC to the positive supply and VEE to ground. For NECL (negative ECL) operation, bias VCC to ground and VEE to the negative supply. The buffers offer 95ps propagation delay, 7.5GHz toggle rate, 10Gbps data rate and 60fs random jitter (RJ). The inputs have center tapped, 100R on-chip termination resistors. A VREF pin is available for biasing ac-coupled inputs. The ECL output stages are designed to directly drive 800mV each side into 50R terminated to VCC-2V for a total differential output swing of 1.6V.
● On-chip terminations at both input pins
● 95ps Propagation delay
● 7.5GHz Toggle rate
● 60ps Typical output rise/fall
● 60fs Random jitter (RJ)
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