| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 20 Pin |
| Supply Voltage (DC) | 5.50 V |
| Case/Package | TSSOP-20 |
| Supply Current | 65.0 µA |
| Number of Circuits | 1 Circuit |
| Number of Channels | 8 Channel |
| Number of Positions | 20 Position |
| Number of Bits | 8 Bit |
| Rise Time | 12.0 ns |
| Number of Inputs | 8 Input |
| Operating Temperature (Max) | 85 ℃ |
| Operating Temperature (Min) | -40 ℃ |
| Number of Output Channels | 1 Channel |
| Supply Voltage | 2.3V ~ 5.5V |
| Supply Voltage (Max) | 5.5 V |
| Supply Voltage (Min) | 2.3 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tube |
| Size-Length | 6.5 mm |
| Size-Width | 4.4 mm |
| Size-Height | 1.05 mm |
| Operating Temperature | -40℃ ~ 85℃ |
The ADG3123BRUZ is a 8-channel CMOS Logic to High Voltage Level Translator fabricated on an enhanced LC² MOS process, the device is capable of operating at high supply voltages while maintaining ultralow power consumption. The internal architecture of the device ensures compatibility with logic circuits running from supply voltages within the 2.3 to 5.5V range. The voltages applied to pin VDDA, pin VDDB and pin VSS set the logic levels available at the outputs on the Y side of the device. Pin VDDA and pin VDDB set the high output level for pin Y1 to pin Y6 and for pin Y7 to pin Y8, respectively. The VSS pin sets the low output level for all channels. The ADG3123 can provide output voltages levels down to -24.2V for a low input level and up to 35V for a high input logic level. For proper operation, VDDB must always be greater than or equal to VDDA and the voltage between the pin VDDB and pin VSS should not exceed 35V.
● 100kHz Operating frequency (typical)
● 65µA Ultralow quiescent current (typical)
● 12/19.5ns Rise/fall time (typical)
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