GENERAL DESCRIPTION
●The ADN4668 is a quad-channel CMOS, low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pin configuration for easy PCB layout and separation of input and output signals.
●FEATURES
●±15 kV ESD protection on receiver input pins
●400 Mbps (200 MHz) switching rates
●Flow-through pin configuration simplifies PCB layout
●150 ps channel-to-channel skew (typical)
●100 ps differential skew (typical)
●2.7 ns maximum propagation delay
●3.3 V power supply
●High impedance outputs on power-down
●Low power design (3 mW quiescent typical)
●Interoperable with existing 5 V LVDS drivers
●Accepts small swing (310 mV typical) differential input signal levels
●Supports open, short, and terminated input fail-safe
●0 V to −100 mV threshold region
●Conforms to TIA/EIA-644 LVDS standard
●Industrial operating temperature range of −40°C to +85°C
●Available in 16-lead surface-mount SOIC and 16-lead low profile TSSOP package
●APPLICATIONS
●Point-to-point data transmission
●Multidrop buses
●Clock distribution networks
●Backplane receivers
