TYPE | DESCRIPTION |
---|
Mounting Style | Surface Mount |
Number of Pins | 8 Pin |
Supply Voltage (DC) | 3.00V (min) |
Case/Package | SOIC-8 |
Supply Current | 16 mA |
Number of Positions | 8 Position |
Power Dissipation | 94 mW |
Input Voltage (Max) | 2 V |
Input Voltage (Min) | 0.8 V |
Output Voltage (Max) | 650 mV |
Input Current (Min) | 32 μA |
Operating Temperature (Max) | 85 ℃ |
Operating Temperature (Min) | -40 ℃ |
Power Dissipation (Max) | 94 mW |
Supply Voltage | 3.3 V |
Supply Voltage (Max) | 3.6 V |
Supply Voltage (Min) | 3 V |
TYPE | DESCRIPTION |
---|
Product Lifecycle Status | Active |
Packaging | Each |
Size-Length | 5 mm |
Size-Width | 4 mm |
Size-Height | 1.5 mm |
Operating Temperature | -40℃ ~ 85℃ |
The ADN4694EBRZ is a multipoint low voltage differential signalling (M-LVDS) Transceiver (Driver and Receiver pairs) that can operate at up to 100Mbps (50MHz). Slew rate control is implemented on the driver outputs. The receivers detect the bus state with a differential input of as little as 50mV over a common-mode voltage range of -1 to 3.4V. ESD protection of up to ±15kV is implemented on the bus pins. The parts adhere to the TIA/EIA-899 standard for M-LVDS and complement TIA/EIA-644 LVDS devices with additional multipoint capabilities. The ADN4694E is type-2 receivers exhibiting an offset threshold, guaranteeing the output state when the bus is idle (bus-idle fail-safe) or the inputs are open (open-circuit fail-safe).
● Threshold offset of 100mV for open-circuit and bus-idle failsafe
● Glitch-free power-up/power-down on M-LVDS bus
● Controlled transition times on driver output
● Common-mode range of -1 to 3.4V, allowing communication with 2V of ground noise
● Driver outputs high-Z when disabled or powered-OFF
● Enhanced ESD protection on bus pins
ADI
ANALOG DEVICES ADN4694EBRZ LVDS Driver, Half Duplex, LVDS Transceiver, 150 ps, 24mA, -40℃, 85℃, 3V
ADI
LVDS Transceiver 100Mbps 0.65V 8Pin SOIC N T/R
ADI
3.3V, 100Mbps, Half-Duplex, High Speed M-LVDS Transceiver with Type 2 Receiver
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