AM26LS33ACD Datasheet PDF - TI

The AM26LS33ACD is a quadruple differential Line Receiver for balanced and unbalanced digital data transmission. The enable function is common to all four receivers and offers a choice of active-high or active-low input. The 3-state outputs permit connection directly to a bus-organized system. Fail-safe design ensures that, if the inputs are open, the outputs always are high. It incorporates an additional stage of amplification to improve sensitivity. The input impedance has been increased, resulting in less loading of the bus line. The additional stage has increased propagation delay, however, this does not affect interchangeability in most applications.

● 3-state Outputs

● Low-power Schottky circuitry

● Complementary output-enable inputs

● Operate from a single 5V supply

● Designed to be interchangeable with advanced micro device AM26LS33™

● ±15V Common-mode range

● ±500mV Sensitivity

● 50mV Typical input hysteresis

● 12kR Minimum input impedance

● Green product and no Sb/Br