| TYPE | DESCRIPTION |
|---|
| Mounting Style | Through Hole |
| Frequency | 17 MHz |
| Number of Pins | 16 Pin |
| Supply Voltage (DC) | 15.0 V, 18.0 V (max) |
| Case/Package | DIP-16 |
| Number of Outputs | 3 Output |
| Number of Circuits | 2 Circuit |
| Number of Positions | 16 Position |
| Number of Bits | 8 Bit |
| Voltage Nodes | 5.00 V, 10.0 V, 15.0 V |
| Power Dissipation | 500 mW |
| Input Capacitance | 5.00 pF |
| Number of Inputs | 9 Input |
| Operating Temperature (Max) | 125 ℃ |
| Operating Temperature (Min) | -55 ℃ |
| Supply Voltage | 3V ~ 18V |
| Supply Voltage (Max) | 18 V |
| Supply Voltage (Min) | 3 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tube |
| Operating Temperature | -55℃ ~ 125℃ |
The CD4014BE is a 8-stage CMOS Static Shift Register having common clock and parallel/serial Control inputs, a single Serial data input and individual parallel JAM inputs to each register stage. Each register stage is D-type, master-slave flip-flop. In addition to an output form stage 8, Q outputs are also available from stages 6 and 7. Parallel as well as serial entry is made into the register synchronously with the positive clock line transition in the CD4014B. The entry is controlled by the parallel/serial control input. When the parallel/serial control input is low, data is serially shifted into the 8-stage register synchronously with the positive transition of the clock line. When the Parallel/Serial Control input is high, data is jammed into the 8-stage register via the parallel input lines and synchronous with the positive transition of the clock line.
● Fully static operation
● Standardized, symmetrical output characteristics
● 100% Tested for quiescent current at 20V
● 12MHz Typical medium speed operation
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