TYPE | DESCRIPTION |
---|
Mounting Style | Surface Mount |
Number of Pins | 16 Pin |
Supply Voltage (DC) | 3.00V (min) |
Case/Package | SOIC-16 |
Number of Outputs | 4 Output |
Output Current | 6.8 mA |
Number of Circuits | 1 Circuit |
Number of Channels | 4 Channel |
Number of Positions | 16 Position |
Number of Bits | 4 Bit |
Voltage Nodes | 5.00 V, 10.0 V, 15.0 V |
Number of Inputs | 4 Input |
Operating Temperature (Max) | 125 ℃ |
Operating Temperature (Min) | -55 ℃ |
Supply Voltage | 3V ~ 18V |
Supply Voltage (Max) | 18 V |
Supply Voltage (Min) | 3 V |
TYPE | DESCRIPTION |
---|
Product Lifecycle Status | Active |
Packaging | Tube |
Size-Length | 9.9 mm |
Size-Width | 3.91 mm |
Size-Height | 1.58 mm |
Operating Temperature | -55℃ ~ 125℃ |
The CD4042BD is a quad CMOS clocked D-type Latch IC contains four latch circuits, each strobed by a common clock. Complementary buffered outputs are available from each circuit. The impedance of the n- and p-channel output devices is balanced and all outputs are electrically identical. Information present at the data input is transferred to outputs Q and Q\ during the clock level which is programmed by the polarity input. For polarity = 0 the transfer occurs during the 0 clock level and for polarity = 1 the transfer occurs during the 1 clock level. The outputs follow the data input providing the clock and polarity levels defined above are present. When a clock transition occurs (positive for polarity = 0 and negative for polarity = 1) the information present at the input during the clock transition is retained at the output until an opposite clock transition occurs.
● Clock polarity control
● Q and Q\ Outputs
● Common Clock
● low power TTL compatible
● Standardized, symmetrical output characteristics
● 100% Tested for quiescent current at 20V
● Green product and no Sb/Br
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TEXAS INSTRUMENTS CD4042BEE4 Latch, CD4042, D Type, Differential, 40ns, 6.8mA, DIP
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