TYPE | DESCRIPTION |
---|
Mounting Style | Through Hole |
Frequency | 6 MHz |
Number of Pins | 16 Pin |
Supply Voltage (DC) | 15.0 V, 18.0 V (max) |
Case/Package | PDIP-16 |
Number of Outputs | 10 Output |
Number of Circuits | 2 Circuit |
Number of Positions | 16 Position |
Number of Bits | 8 Bit |
Voltage Nodes | 5.00 V, 10.0 V, 15.0 V |
Number of Gates | 1 Gate |
Number of Inputs | 1 Input |
Operating Temperature (Max) | 125 ℃ |
Operating Temperature (Min) | -55 ℃ |
Supply Voltage | 3V ~ 18V |
Supply Voltage (Max) | 18 V |
Supply Voltage (Min) | 3 V |
TYPE | DESCRIPTION |
---|
Product Lifecycle Status | Active |
Packaging | Tube |
Size-Length | 19.3 mm |
Size-Width | 6.35 mm |
Size-Height | 4.57 mm |
Operating Temperature | -55℃ ~ 125℃ |
The CD4094BE is a CMOS 8-stage Shift-and-Store Bus Register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs. The parallel outputs may be connected directly to common bus lines. Data is shifted on positive clock transitions. The data in each shift register stage is transferred to the storage register when the strobe input is high. Data in the storage register appears at the outputs whenever the output-enable signal is high. Data is available at the QS serial output terminal on positive clock edges to allow for high-speed operation in cascaded systems in which the clock rise time is fast. The same serial information, available at the Q"S terminal on the next negative clock edge, provides a means for cascading CD4094BE devices when the clock rise time is slow.
● 3-state parallel outputs for connection to common bus
● Separate serial outputs synchronous to both positive and negative clock edges for cascading
● Medium speed operation (5MHz at 10V)
● Standardized, symmetrical output characteristics
● 100% Tested for quiescent current at 20V
● Maximum input current of 1µA at 18V
● Green product
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