| TYPE | DESCRIPTION |
|---|
| Mounting Style | Surface Mount |
| Number of Pins | 16 Pin |
| Supply Voltage (DC) | 2.00V ~ 6.00V |
| Case/Package | SOIC-16 |
| Number of Outputs | 10 Output |
| Number of Positions | 16 Position |
| Clock Speed | 60 MHz |
| Number of Bits | 5 Bit |
| Voltage Nodes | 6.00 V, 5.00 V, 2.00 V |
| Number of Inputs | 1 Input |
| Operating Temperature (Max) | 125 ℃ |
| Operating Temperature (Min) | -55 ℃ |
| Supply Voltage | 2V ~ 6V |
| Supply Voltage (Max) | 6 V |
| Supply Voltage (Min) | 2 V |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Active |
| Packaging | Tube |
| Size-Length | 9.9 mm |
| Size-Width | 3.91 mm |
| Size-Height | 1.58 mm |
| Operating Temperature | -55℃ ~ 125℃ |
The CD74HC4017M is a 5-stage high speed silicon gate CMOS Johnson Counter with 10 decoded outputs. Each of the decoded outputs is normally low and sequentially goes high on the low to high transition clock period of the 10 clock period cycle. The carry (TC) output transitions low to high after OUTPUT 10 goes low and can be used in conjunction with the CE\ to cascade several stages. The CE input disables counting when in the high state. A RESET (MR) input is also provided which when taken high sets all the decoded outputs, except "0", low. The device can drive up to 10 low power Schottky equivalent loads.
● Fully static operation
● Buffered inputs
● Common reset
● Positive edge clocking
● Balanced propagation delay and transition times
● Significant power reduction compared to LSTTL logic ICs
● 10 LSTTL Load standard outputs
● 15 LSTTL Loads bus driver outputs
● Green product and no Sb/Br
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TEXAS INSTRUMENTS CD74HC4017M Decade Counter / Divider, HC Family, 60MHz, 2V to 6V, SOIC-16
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