Description
●The CD74HC93 and CD74HCT93 are high-speed silicon-gate CMOS devices and are pin-compatible with low power Schottky TTL (LSTTL). These 4-bit binary ripple counters consist of four master-slave flip-flops internally connected to provide a divide-by-two section and a divide- by-eight section. Each section has a separate clock input (CP0 andCP1) to initiate state changes of the counter on the HIGH to LOW clock transition. State changes of the Qnoutputs do not occur simultaneously because of internal ripple delays. Therefore, decoded output signals are subject to decoding spikes and should not be used for clocks or strobes.
●Features
●• Can Be Configured to Divide By 2, 8, and 16
●• Asynchronous Master Reset
●• Fanout (Over Temperature Range)
●\- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
●\- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
●• Wide Operating Temperature Range . . . -55oC to 125oC
●• Balanced Propagation Delay and Transition Times
●• Significant Power Reduction Compared to LSTTL Logic ICs
●• HC Types
●\- 2V to 6V Operation
●\- High Noise Immunity: NIL= 30%, NIH= 30% of VCC at VCC= 5V
●• HCT Types
●\- 4.5V to 5.5V Operation
●\- Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min)
●\- CMOS Input Compatibility, Il ≤1µA at VOL, VOH
