General Description
●The CS5521/22/23/24/28 are highly integrated ∆Σana log-to-digital converters(ADCs) which use charge balance techniques to achieve 16-bit (CS5521/23) and 24-bit (CS5522/24/28) performance. The ADCs come as either two-channel (CS5521/22), four-channel (CS5523/24), or eight-channel (CS5528) devices and include a low-input-current, chopper-stabilized instrumentation amplifier. To permit selectable input spans of 25 mV, 55 mV, 100 mV, 1 V, 2.5 V, and 5 V, the ADCs include a PGA (programmable gain amplifier). To accommodate ground-based thermocouple applications, the devices include a charge pump drive which provides a negative bias voltage to the on-chip amplifiers.
●Features
●Low Input Current (100 pA), Chopper stabilized Instrumentation Amplifier
●Scalable Input Span (Bipolar/Unipolar)
●\- 2.5V VREF: 25 mV, 55 mV, 100 mV, 1 V, 2.5 V, 5 V
●\- External: 10 V, 100 V
●Wide VREFInput Range (+1 to +5 V)
●Fourth Order Delta-Sigma A/D Converter
●Easy to Use Three-wire Serial Interface Port
●\- Programmable/Auto Channel Sequencer with Conversion Data FIFO
●\- Accessible Calibration Registers per Channel
●\- Compatible with SPI™and Microwire™ System and Self Calibration
●Eight Selectable Word Rates
●\- Up to 617 Sps (XIN = 200 kHz)
●\- Single Conversion Settling
●\- 50/60 Hz ±3 Hz Simultaneous Rejection
●Single +5 V Power Supply Operation
●\- Charge Pump Drive for Negative Supply
●\- +3 to +5 V Digital Supply Operation
●Low Power Consumption: 6.0 mW
