DS90C032TM Datasheet PDF - TI

The DS90C032TM is a quad CMOS differential Line Receiver designed for applications requiring ultra-low power dissipation and high data rates. The device supports data rates in excess of 155.5Mbps (77.7MHz) and uses low voltage differential signaling (LVDS) technology. It accepts low voltage (350mV) differential input signals and translates them to CMOS (TTL compatible) output levels. The receiver supports a tri-state function that may be used to multiplex outputs. The receiver also supports open, shorted and terminated (100R) input failsafe with the addition of external failsafe biasing. Receiver output will be high for both failsafe conditions.

● Accepts small swing (350mV) differential signal levels

● Industrial operating temperature range

● Pin-compatible with DS26C32A, MB570 (PECL) and 41LF (PECL)

● Supports open input failsafe

● Supports short and terminated input failsafe with the addition of external failsafe biasing

● Compatible with IEEE 1596.3 SCI LVDS standard

● 600ps Maximum differential skew (5V, 25°C)

● 6ns Maximum propagation delay