The DSPIC33FJ128GP804-I/PT is a 16-bit Digital Signal Controller with advanced analogue. The CPU module has a 16-bit (data) modified Harvard architecture with an enhanced instruction set, including significant support for DSP. The CPU has a 24-bit instruction word with a variable length opcode field. The Program Counter (PC) is 23-bit wide and addresses up to 4M x 24-bit of user program memory space. The actual amount of program memory implemented varies by device. A single-cycle instruction prefetch mechanism is used to help maintain throughput and provides predictable execution. All instructions execute in a single cycle, with the exception of instructions that change the program flow, the double-word move (MOV.D) instruction and the table instructions. Overhead-free program loop constructs are supported using the DO and REPEAT instructions, both of which are interruptible at any time.
● C compiler optimized instruction set
● Linear program memory addressing up to 4M instruction words
● Linear data memory addressing up to 64kb
● 83 base instructions, mostly 1 word/1 cycle
● Two 40-bit Accumulators with rounding and saturation options
● On-chip flash program memory
● Data SRAM
● Boot, secure and general security for program flash
● 8-channel hardware DMA
● Timer/counters, up to five 16-bit timers can pair up to make two 32-bit timers
● Interrupt controller - 5-cycle latency, 118 interrupt vectors
● Digital I/O - peripheral pin select functionality
● System management - External, crystal, resonator, internal RC flexible clock option
● Power management - On-chip 2.5V voltage regulator
● Analogue-to-digital converters (ADCs) - 10-bit, 1.1MSPS or 12-bit, 500kSPS conversion
● Audio digital-to-analogue converter (DAC) - 16-bit dual channel DAC module
● Data converter interface (DCI) module - Codec interface
● Two analogue comparators with programmable input/output configuration
● Low-power, high-speed CMOS flash technology
● Communication modules - 4-wire SPI (up to two modules)
●ESD sensitive device, take proper precaution while handling the device.