| TYPE | DESCRIPTION |
|---|
| Frequency | 250 MHz |
| Number of Pins | 44 Pin |
| Case/Package | PLCC |
| Operating Temperature (Max) | 70 ℃ |
| Operating Temperature (Min) | 0 ℃ |
| TYPE | DESCRIPTION |
|---|
| Product Lifecycle Status | Obsolete |
| Packaging | Rail, Tube |
Intel
66 Pages / 1.45 MByte
Altera
Programmable logic , 64 macrocells, 4 logic array blocks, 36 I/O pins, 10ns
Altera
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CPLD MAX 7000 Family 1.25K Gates 64 Macro Cells 100MHz CMOS Technology 5V 44Pin PLCC
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CPLD MAX 7000S Family 1.25K Gates 64 Macro Cells 166.7MHz CMOS Technology 5V 44Pin PLCC
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CPLD MAX 7000A Family 1.25K Gates 64 Macro Cells 100MHz CMOS Technology 3.3V 44Pin TQFP
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Ic Cpld 64mc 15ns 68plcc Ic Cpld 64mc 15ns 68plcc Ic Cpld 64mc 15ns 68plcc Ic Cpld 64mc 15ns 68plcc
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