FDG6303N Datasheet PDF - ON Semiconductor

These dual N-Channel logic level enhancement mode field effect transistors are produced using Fairchild"s proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for bipolar digital transistors and small signal MOSFETS.

●Features

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● 25 V, 0.50 A continuous, 1.5 A Peak.

● RDS(ON) = 0.45 Ω @ VGS= 4.5 V,

● RDS(ON) = 0.60 Ω @ VGS= 2.7 V.

● Very low level gate drive requirements allowing direct operation in 3 V circuits (VGS(th) <1.5 V).

● Gate-Source Zener for ESD ruggedness (>6kV Human Body Model).

● Compact industry standard SC70-6 surface mount package.