TYPE | DESCRIPTION |
---|
Mounting Style | Surface Mount |
Number of Pins | 6 Pin |
Voltage Rating (DC) | -25.0 V |
Current Rating | -410 mA |
Case/Package | SC-70-6 |
Number of Positions | 6 Position |
Drain to Source Resistance (on) (Rds) | 0.85 Ω |
Polarity | P-Channel, Dual P-Channel |
Power Dissipation | 300 mW |
Input Capacitance | 62.0 pF |
Gate Charge | 1.10 nC |
Drain to Source Voltage (Vds) | 25 V |
Breakdown Voltage (Drain to Source) | -25.0 V |
Continuous Drain Current (Ids) | -410 mA |
Rise Time | 8 ns |
Input Capacitance (Ciss) | 62pF @10V(Vds) |
Input Power (Max) | 300 mW |
Fall Time | 35 ns |
Operating Temperature (Max) | 150 ℃ |
Operating Temperature (Min) | -55 ℃ |
TYPE | DESCRIPTION |
---|
Product Lifecycle Status | Active |
Packaging | Tape & Reel (TR) |
Size-Length | 2 mm |
Size-Width | 1.25 mm |
Size-Height | 1.1 mm |
Operating Temperature | -55℃ ~ 150℃ (TJ) |
Dual P-Channel, Digital FET General Description These dual P-Channel logic level enhancement mode field effect transistors are produced using Fairchild"s proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for bipolar digital transistors and small signal MOSFETs. Features Very low level gate drive requirements allowing direct operation in 3 V circuits . Compact industry standard SC70-6 surface mount package.
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