HEF4017BP Datasheet PDF - NXP

The HEF4017BP is a 5-stage Johnson Decade Counter with ten spike-free decoded active high outputs (Q0 to Q9), an active low carry output from the most significant flip-flop (Q5-9), active high and active low clock inputs (CP0, CP1) and an overriding asynchronous master reset input (MR). The counter is advanced by either a low-to-high transition at CP0 while CP1 is LOW or a high-to-low transition at CP1 while CP0 is high. When cascading counters, the Q5-9 output, which is low while the counter is in states 5, 6, 7, 8 and 9 can be used to drive the CP0 input of the next counter. A high on MR resets the counter to zero (Q0=Q5-9=high; Q1 to Q9=low) independent of the clock inputs (CP0, CP1). Schmitt trigger action makes the clock inputs highly tolerant of slower rise and fall times. It operates over a recommended VDD power supply range of 3 to 15V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS or another input.

● Automatic counter correction

● Tolerant of slow clock rise and fall times

● Fully static operation

● Standardized symmetrical output characteristics